Power saving display having improved image quality
US11663986B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 3, 2022 |
| Grant date | May 30, 2023 |
| Priority date | — |
| Expiry date | May 3, 2042 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure is directed to systems and methods of optimizing display image quality on display devices having a plurality of display power modes. An example apparatus includes processor circuitry to execute instructions to: determine a baseline allowable percentage of distorted pixels for a power mode of a display; determine a baseline first relationship between an original pixel value and a boosted pixel value for the power mode; determine a baseline second relationship based on the baseline allowable percentage and the baseline first relationship; select a plurality of test distorted pixel percentages; determine, for respective selected test distorted pixel percentages, a corresponding test relationship between an original pixel color value distribution and a boosted pixel color value distribution based on the baseline second relationship; determine, for respective test relationships, a respective test peak signal to noise ratio (PSNR); determine, for the respective test PSNRs, respective values indicative of the change in image quality for the test distorted pixel percentages; and select, as the operating distorted original pixel percentage value, one of the test disto…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.