Patent · US Active

Semiconductor structure and fabrication method thereof

US11664227B2 · kind B2 · utility

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19Claims
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Key dates

Filing dateSep 17, 2020
Grant dateMay 30, 2023
Priority date
Expiry dateJul 24, 2041

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/0337
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor structure and a method for forming the semiconductor structure are provided. The method includes providing a to-be-etched layer; forming an initial mask layer over the to-be-etched layer; forming a patterned structure, on the initial mask layer and exposing a portion of the initial mask layer; forming a barrier layer on a sidewall surface of the patterned structure; using the patterned structure and the barrier layer as a mask, performing an ion doping process on the initial mask layer to form a doped region and an un-doped region between doped regions in the initial mask layer; removing the patterned structure and the barrier layer; and forming a mask layer on a top surface of the to-be-etched layer by removing the un-doped region. The mask layer includes a first opening exposing the top surface of the to-be-etched layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.