Semiconductor device and method of fabricating the same
US11664310B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2021 |
| Grant date | May 30, 2023 |
| Priority date | — |
| Expiry date | Dec 1, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0193
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including transistors on a substrate, a first interlayer insulating layer on the transistors, a first lower interconnection line and a second lower interconnection line in an upper portion of the first interlayer insulating layer, a dielectric layer being selectively on a top surface of the first interlayer insulating layer except top surfaces of the first and second lower interconnection lines, an etch stop layer on the first and second lower interconnection lines and the dielectric layer, a second interlayer insulating layer on the etch stop layer, and an upper interconnection line in the second interlayer insulating layer may be provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.