Semiconductor memory device
US11665885B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 2021 |
| Grant date | May 30, 2023 |
| Priority date | — |
| Expiry date | May 12, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/488
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device is provided in the present invention, including a substrate, word lines in the substrate, bit lines over the word lines, partition structures between the bit lines and right above the word lines, storage node contacts in spaces defined by the bit lines and the partition structures and electrically connecting with the substrate, wherein a portion of the storage node contact protruding from top surfaces of the bit lines and the partition structures is contact pad, and contact pad isolation structures on the partition structures and between the contact pads, wherein the contact pad isolation structure includes outer silicon nitride layers and inner silicon oxide layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.