Processor, system on chip including heterogeneous core, and operating methods thereof for optimizing hot functions for execution on each core of a heterogeneous processor
US11669491B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2021 |
| Grant date | Jun 6, 2023 |
| Priority date | — |
| Expiry date | Jun 24, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is an operation method of a processor including a plurality of heterogeneous cores, the operation method including selecting an execution core of the plurality of heterogeneous cores for executing an application, loading, from a memory, first data corresponding to core information of the execution core during runtime of the execution core, wherein the first data is included in compile data, the compile data including a first function compiled for each heterogeneous core of the plurality of heterogeneous cores, the first function being a function from among a plurality of functions of the application that is at least one of frequently called or having a long execution time, and processing, by the execution core, execution codes for executing the application, based on the first data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.