Non-volatile memory device, memory system including the device, and method of operating the device
US11670387B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2021 |
| Grant date | Jun 6, 2023 |
| Priority date | — |
| Expiry date | Dec 2, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory device includes a memory cell array including memory cells, a page buffer circuit including page buffers respectively connected to bit lines, a buffer memory, and a control logic configured to control a read operation on the memory cells. In the read operation, the control logic obtains valley search detection information including read target block information and word line information by performing a valley search sensing operation on a distribution of threshold voltages of the memory cells, obtains a plurality of read levels using a read information model by inputting the valley search detection information into the read information model, and performs a main sensing operation for the read operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.