Ceramic electronic component and method of manufacturing the same
US11670457B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 29, 2021 |
| Grant date | Jun 6, 2023 |
| Priority date | — |
| Expiry date | Aug 6, 2041 |
Classification
- Technology area (CPC C)Chemistry; Metallurgy
- CPC primaryC04B2235/6562
- WIPO fieldMaterials, metallurgy
- WIPO sectorChemistry
Abstract
A ceramic electronic component includes a multilayer chip including a multilayer structure, which includes ceramic dielectric layers and internal electrode layers that are alternately stacked, and cover layers respectively disposed on top and bottom faces of the multilayer structure in a first direction in which the dielectric layers and the internal electrode layers are alternately stacked, wherein each of the cover layers includes a relatively high porous section and a first relatively less porous section having a pore ratio less than a pore ratio of the relatively high porous section, the relatively high porous section laterally spreading and spanning an entire length of the cover layer in a second direction orthogonal to the first direction, the pore ratio of the relatively high porous section being 1% or greater, the first relatively less porous section being interposed between the relatively high porous section and the multilayer structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.