Method of manufacturing semiconductor device having buried gate electrodes
US11670537B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 4, 2021 |
| Grant date | Jun 6, 2023 |
| Priority date | — |
| Expiry date | Mar 5, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/053
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device, which has buried gate electrodes, includes: forming a plurality of gate trenches in a substrate having a plurality of active regions defined by a device isolation film, the plurality of gate trenches crossing the plurality of active regions and extending parallel to each other in a first horizontal direction; selectively forming a first gate insulating layer on an exposed surface of the substrate; forming a second gate insulating layer on exposed surfaces of both the first gate insulating layer and the device isolation film; and forming a plurality of gate insulating layers by partially removing the first gate insulating layer and the second gate insulating layer, and forming a plurality of buried gate electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.