Pulse signal generation circuit and method, and memory
US11671106B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2022 |
| Grant date | Jun 6, 2023 |
| Priority date | — |
| Expiry date | Jan 27, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/135
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A pulse signal generation circuit includes a clock frequency division component, a time delay component and a selection component. The clock frequency division component is configured to perform frequency division on a clock signal to generate a clock frequency division signal; the time delay component is configured to generate a time delay signal based on the clock frequency division signal; and the selection component is configured to receive the clock frequency division signal and the time delay signal at the same time, and select the clock frequency division signal and the time delay signal according to a preset condition to generate a pulse signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.