Apparatuses and methods for joint interference cancelation
US11671235B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2016 |
| Grant date | Jun 6, 2023 |
| Priority date | — |
| Expiry date | Mar 20, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B15/00
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A communication circuit arrangement includes a first kernel dimension filter circuit configured to apply a first kernel dimension filter to a first input signal to estimate a first kernel dimension interference signal from a first amplifier, a second kernel dimension filter circuit configured to apply a second kernel dimension filter to a second input signal to estimate a second kernel dimension interference signal from a second amplifier, a joint delay tap dimension filter configured to apply a joint delay tap dimension filter to a combination of the first kernel dimension interference signal and the second kernel dimension interference signal to obtain an estimated joint interference signal, and a cancelation circuit configured to remove the estimated joint interference signal from a received signal to obtain a clean signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.