Layered structure with high dielectric constant for use with active matrix backplanes
US11675244B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2020 |
| Grant date | Jun 13, 2023 |
| Priority date | — |
| Expiry date | Jun 12, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2001/1678
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Layered dielectric materials for use in controlling dielectric strength in microelectronic devices, especially as they relate to electrophoretic and electrowetting applications. Specifically, a combination of a first atomic layer deposition (ALD) step, a sputtering step, and a second ALD step result in a layer that is chemically robust and nearly pinhole free. The dielectric layer may be disposed on the transparent common electrode of an electrophoretic display or covering the pixelated backplane electrodes, or both.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.