Storage devices including heterogeneous processors which share memory and methods of operating the same
US11681553B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Sep 6, 2019 |
| Grant date | Jun 20, 2023 |
| Priority date | — |
| Expiry date | Nov 29, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A storage device includes an accelerator including a first processor, and a storage controller that uses a buffer memory as a working memory and includes a second processor different in type from the first processor. The second processor is configured to establish a first communication path between the first processor and the buffer memory responsive to a request of the first processor, and the first processor is configured to access the buffer memory through the first communication path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.