Patent · US Active

Memory disaggregation and reallocation

US11681646B1 · kind B1 · utility

3Cited by
2References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 16, 2022
Grant dateJun 20, 2023
Priority date
Expiry dateMar 6, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/4282
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A server rack has server sleds, each including a motherboard upon which is mounted: a memory module, a cache, at least one CPU connected to the cache, a memory controller connected to the cache and the memory module, an I/O hub, and a fabric interface (FIC) having a memory bridge and optical transceivers, where this memory bridge is connected to the I/O hub through this motherboard. The rack also has a memory sled disaggregated from the server sleds and that includes: a motherboard upon which is mounted: memory modules and a FIC having a memory bridge, a memory controller and optical transceivers, wherein this memory controller is connected to these memory modules through this motherboard, and wherein this memory bridge connects the memory controller to the optical transceivers. The rack has a photonic cross-connect switch interconnected by optical fiber cables to the optical transceivers of the server and memory sleds.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.