Systems and methods for degeneracy mitigation in a quantum processor
US11681940B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2021 |
| Grant date | Jun 20, 2023 |
| Priority date | — |
| Expiry date | Jul 19, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N10/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Degeneracy in analog processor (e.g., quantum processor) operation is mitigated via use of floppy qubits or domains of floppy qubits (i.e., qubit(s) for which the state can be flipped with no change in energy), which can significantly boost hardware performance on certain problems, as well as improve hardware performance for more general problem sets. Samples are drawn from an analog processor, and devices comprising the analog processor evaluated for floppiness. A normalized floppiness metric is calculated, and an offset added to advance the device in annealing. Degeneracy in a hybrid computing system that comprises a quantum processor is mitigated by determining a magnetic susceptibility of a qubit, and tuning a tunneling rate for the qubit based on a tunneling rate offset determined based on the magnetic susceptibility. Quantum annealing evolution is controlled by causing the evolution to pause for a determined pause duration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.