Comparators
US11683027B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 19, 2020 |
| Grant date | Jun 20, 2023 |
| Priority date | — |
| Expiry date | Nov 19, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00156
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A comparator includes a first-stage op amp circuit, a second-stage op amp circuit, a bias circuit and a clamping circuit. The first-stage op amp circuit includes two voltage input terminals and a voltage output terminal; the second-stage op amp circuit is connected with the bias circuit and the voltage output terminal of the first-stage op amp circuit; and the clamping circuit is connected with the voltage output terminal of the first-stage op amp circuit. By adding a clamping circuit in the comparator, the highest voltage at the voltage output terminal of the first-stage op amp circuit can be clamped to a preset voltage. During the operation of the comparator, the voltage change range of the voltage output terminal of the first-stage op amp circuit is smaller, which reduces the discharge delay of the voltage output terminal of the first-stage op amp circuit, thereby increasing the flip speed of the comparator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.