System and method of testing single DUT through multiple cores in parallel
US11686768B2 · kind B2 · utility
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7References
16Claims
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Key dates
| Filing date | Jul 14, 2021 |
| Grant date | Jun 27, 2023 |
| Priority date | — |
| Expiry date | Sep 24, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/50
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The present disclosure provides a method of testing a single device under test (DUT) through multiple cores in parallel, which includes steps as follows. The test quantity of the DUT is calculated; the test quantity of the DUT is evenly allocated to to a plurality of test cores, so as to control a period of testing the DUT through the test cores in parallel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.