Optoelectronic computing platform
US11686955B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 6, 2021 |
| Grant date | Jun 27, 2023 |
| Priority date | — |
| Expiry date | Jul 6, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/225
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An integrated circuit interposer includes a semiconductor substrate layer; a first metal contact layer including a first metal contact section that includes metal contacts arranged for electrically coupling to a first semiconductor die in a controlled collapsed chip connection, and a second metal contact section that includes metal contacts arranged for electrically coupling to a second semiconductor die in a controlled collapsed chip connection. A first patterned layer includes individually photomask patterned metal path sections. A second patterned layer includes individually photomask patterned waveguide sections, including a first waveguide that crosses at least one boundary between individually photomask patterned waveguide sections. A first modulator is coupled to the first waveguide for modulating an optical wave in the first waveguide based on an electrical signal received at a first metal contact in the first metal contact section, and a second modulator is coupled to the first waveguide for modulating the optical wave based on an electrical signal received at a second metal contact in the first metal contact section or the second metal contact section.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.