Patent · US Active

Data deduplication latency reduction

US11687243B2 · kind B2 · utility

0Cited by
2References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 22, 2021
Grant dateJun 27, 2023
Priority date
Expiry dateAug 26, 2041

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/6024
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Aspects of the present disclosure relate to reducing the latency of data deduplication. In embodiments, an input/output (IO) workload received by a storage array is monitored. Further, at least one IO write operation in the IO workload is identified. A space-efficient probabilistic data structure is used to determine if a director board is associated with the IO write. Additionally, the IO write operation is processed based on the determination.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.