Programmable state machine for a hardware performance monitor
US11687435B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2021 |
| Grant date | Jun 27, 2023 |
| Priority date | — |
| Expiry date | Jan 17, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/88
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processing unit can include a performance monitor for monitoring the performance of the processing unit and associated sub-units. The performance monitor can include a state machine. The state machine can be implemented via state machine data entries stored in a memory associated with the performance monitor. A state machine data entry includes information indicating a state transition condition and output signals. The state transition condition includes a current state and input signals required to meet the condition. The output signals include a next state, one or more counter actions, and one or more triggers. The performance monitor implements logic circuits that determine, based on input signals and the state machine data entries, the next state to transition and associated output signals. The state machine data entries can be written and re-written by a user.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.