Mechanical wafer alignment detection for bonding process
US11688717B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2021 |
| Grant date | Jun 27, 2023 |
| Priority date | — |
| Expiry date | Aug 26, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/8393
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Various embodiments of the present disclosure are directed towards a method for forming a semiconductor structure. The method includes loading a first wafer and a second wafer onto a bonding platform such that the second wafer overlies the first wafer. An alignment process is performed to align the second wafer over the first wafer by virtue of a plurality of wafer pins, where a plurality of first parameters are associated with the wafer pins during the alignment process. The second wafer is bonded to the first wafer. An overlay (OVL) measurement process is performed on the first wafer and the second wafer by virtue of the plurality of wafer pins, where a plurality of second parameters are associated with the wafer pins during the alignment process. An OVL shift is determined between the first wafer and the second wafer based on a comparison between the first parameters associated with the wafer pins during the alignment process and the second parameters associated with the wafer pins during the OVL measurement process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.