Semiconductor device
US11688740B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 10, 2022 |
| Grant date | Jun 27, 2023 |
| Priority date | — |
| Expiry date | May 10, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/981
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including a substrate; first to third active patterns on an upper portion of the substrate, the active patterns being sequentially arranged in a first direction and extending in a second direction crossing the first direction; first to third power rails respectively connected to the first to third active patterns, wherein a width of the second active pattern in the first direction is at least two times a width of the first active pattern in the first direction and is at least two times a width of the third active pattern in the first direction, the first active pattern is not vertically overlapped with the first power rail, the second active pattern is vertically overlapped with the second power rail, and the third active pattern is not vertically overlapped with the third power rail.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.