High-voltage to low-voltage interface in power converter circuit
US11689097B2 · kind B2 · utility
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11References
15Claims
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Key dates
| Filing date | May 5, 2021 |
| Grant date | Jun 27, 2023 |
| Priority date | — |
| Expiry date | Sep 25, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/06
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A UHV-LV interface circuit that is capable of the following, among other things: 1) starting up a primary controller of a power converter circuit with a precisely controlled startup charging profile; 2) performing pulse-based line-voltage sensing with reduced power and improved sensing accuracy; and 3) discharging a capacitor, e.g., class-X2 capacitor, with a stable supply voltage for the controller. The UHV-LV interface circuit can use a single UHV device, such as a single depletion-mode transistor, e.g., field-effect transistor (FET).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.