Integrated circuit and operation method thereof
US11689205B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Oct 18, 2021 |
| Grant date | Jun 27, 2023 |
| Priority date | — |
| Expiry date | Oct 18, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03057
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An integrated circuit may include a receiver configured to receive a first data signal based on an mth (where m is an integer of 1 or more) transmitter preset setting among a plurality of transmitter preset settings through an external link, and equalize and sample the first data signal; a receiver setting table including a plurality of combinations including values of a plurality of parameters related to the receiver; and a receiver control circuit configured to sequentially select the plurality of combinations with reference to the receiver setting table and set the plurality of parameters with the selected combinations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.