Half-bridge electronic device comprising two systems for optimizing dead-time between the switching operations of a high level switch and of a low level switch
US11695326B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 14, 2019 |
| Grant date | Jul 4, 2023 |
| Priority date | — |
| Expiry date | Sep 18, 2039 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A half-bridge electronic device comprises, in series, a low level switch and a high level switch connected at a central point, and respectively controlled by a first and a second activation/deactivation signal. The device comprises: a first and a second synchronization system configured to interpret a variation in the voltage at the central point, respectively along a falling edge and along a rising edge, and to respectively generate a first and a second synchronization signal separate from the first; a first and a second AND type logic gate respectively combining the first synchronization signal with a first control signal and the second synchronization signal with a second control signal, in order to respectively form the first and second activation/deactivation signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.