Power amplifier with a power transistor and an electrostatic discharge protection circuit on separate substrates
US11695375B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 3, 2020 |
| Grant date | Jul 4, 2023 |
| Priority date | — |
| Expiry date | Aug 5, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/75
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An amplifier includes a semiconductor die and a substrate that is distinct from the semiconductor die. The semiconductor die includes a III-V semiconductor substrate, a first RF signal input terminal, a first RF signal output terminal, and a transistor (e.g., a GaN FET). The transistor has a control terminal electrically coupled to the first RF signal input terminal, and a current-carrying terminal electrically coupled to the first RF signal output terminal. The substrate includes a second RF signal input terminal, a second RF signal output terminal, circuitry coupled between the second RF signal input terminal and the second RF signal output terminal, and an electrostatic discharge (ESD) protection circuit. The amplifier also includes a connection electrically coupled between the ESD protection circuit and the control terminal of the transistor. The substrate may be another semiconductor die (e.g., with a driver transistor and/or impedance matching circuitry) or an integrated passive device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.