Method and computing device for manufacturing semiconductor device
US11698581B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2021 |
| Grant date | Jul 11, 2023 |
| Priority date | — |
| Expiry date | Sep 30, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N20/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-transitory computer-readable medium storing codes that, when executed by a processor, cause the processor to perform operations of receiving full chip data including specific patterns of a first layout, extracting a representative pattern of the first layout from the full chip data, generating a vector of the extracted representative pattern, generating a first data set based on the generated vector, generating a machine learning model by performing machine learning with respect to the first data set, executing an optical proximity correction (OPC) with respect to the specific patterns of the first layout by using the machine learning model, and generating a second layout based on a result of executing the OPC may be provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.