Programmable signal aggregator
US11698833B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 3, 2022 |
| Grant date | Jul 11, 2023 |
| Priority date | — |
| Expiry date | Jan 3, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0775
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an embodiment, an electronic circuit includes: a plurality of signal channels; a signal collection circuit configured to determine an action of the electronic circuit based on channel signals from the plurality of signal channels; and a first signal management circuit coupled between the plurality of signal channels and the signal collection circuit, the first signal management circuit including: a set of internal registers, a set of user registers, and a decoder configured to program the set of internal registers based on a content of the set of user registers, where the first signal management circuit is configured to receive the channel signals via the plurality of signal channels, generate first aggregated signals based on the received channel signals and a content of the set of internal registers, and transmitting the first aggregated signals to the signal collection circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.