Low dropout (LDO) voltage regulator
US11703898B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2021 |
| Grant date | Jul 18, 2023 |
| Priority date | — |
| Expiry date | Feb 23, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/575
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A low dropout (LDO) voltage regulator includes a first LDO stage that receives a first supply voltage and is active during a first time interval and a second LDO stage that receives a second supply voltage and is active during a second time interval. An operational amplifier receives a feedback voltage based on the LDO output voltage and provides an amplified feedback signal to the first and second LDO stages. A compensation capacitor is selectively coupled between the operational amplifier and either the first or the second LDO stage. A current limit circuit includes a sense FET coupled to the LDO pass FET, a drain voltage replication circuit coupled between the pass FET and sense FET to provide a sense current is indicative of load current when the pass FET is in a linear region, and a current comparator to compare the sense current to a predetermined current level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.