Memory system controlling nonvolatile memory
US11704021B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2021 |
| Grant date | Jul 18, 2023 |
| Priority date | — |
| Expiry date | Nov 29, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a controller of a memory system performs a first operation a plurality of times for each of a plurality of first blocks. The first operation includes a write operation for writing data in a first write mode for writing m-bit data per memory cell and a data erase operation. While a second block is not a defective block, the controller performs a second operation a plurality of times for the second block. The second operation includes a write operation for writing data in a second write mode for writing n-bit data per memory cell and a data erase operation. When the second block is a defective block, the controller selects a first block from the plurality of first blocks, and writes second write data to the selected first block in the second write mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.