Method for control-flow integrity protection, apparatus, device and storage medium
US11704404B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2021 |
| Grant date | Jul 18, 2023 |
| Priority date | — |
| Expiry date | Sep 9, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30181
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure provide a method for control-flow integrity protection, including: changing preset bits of all legal target addresses of a current indirect branch instruction in a control flow of a program to be protected to be same; and rewriting preset bits of a current target address of the current indirect branch instruction to be same as the preset bits of the legal target addresses, so that the program to be protected terminates when the current target address is tampered with. By changing the preset bits of all the legal target addresses of the current indirect branch instruction to be same and rewriting the preset bits of the current target address to be consistent with the preset bits of the legal target addresses, traditional label comparison is replaced by the preset bit overlap operation, reducing performance overhead and improving attack defense efficiency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.