Method for detecting gate line defects, display panel and readable storage medium
US11705027B2 · kind B2 · utility
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19Claims
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Key dates
| Filing date | May 27, 2021 |
| Grant date | Jul 18, 2023 |
| Priority date | — |
| Expiry date | Nov 3, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/026
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The application discloses a method for detecting gate line defects, a display panel and a readable storage medium. The method for detecting gate line defects includes the following operations: controlling a display panel to enter a self-checking mode upon receiving a startup signal; performing row scanning on the display panel according to a first preset frame rate, where the first preset frame rate is greater than a normal frame rate when the display panel normally operates; and upon determining that the display panel is abnormal, issuing a prompt message.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.