Semiconductor device having active fin pattern at cell boundary
US11705456B2 · kind B2 · utility
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13References
13Claims
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Key dates
| Filing date | Mar 12, 2021 |
| Grant date | Jul 18, 2023 |
| Priority date | — |
| Expiry date | Jul 29, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/981
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a first standard cell disposed on a substrate in a first row and having a first cell height; a second standard cell disposed on the substrate in a second row, adjacent to the first row, second standard cell having a second cell height, different from the first cell height; and a power line extending in a first direction along a boundary between the first standard cell and the second standard cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.