On-chip synchronous self-repairing system based on low-frequency reference signal
US11705908B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 9, 2020 |
| Grant date | Jul 18, 2023 |
| Priority date | — |
| Expiry date | Apr 9, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0331
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure discloses an on-chip synchronous self-repairing system based on a low-frequency reference signal. The system adopts a dual-input PLL stellate coupled structure or a dual-input PLL butterfly-shaped coupled structure, and delay of the whole loop is made to be an integral multiple of the reference signal by synchronizing the transmitted reference signal with the received reference signal, so as to ensure synchronization of local oscillation signal of each IC chip. The transmission wire based on an adjustable left-handed material is used as a delay wire to connect the dual-input PLL, thereby achieving low loss and reducing the physical distance of the delay wire. The system has the advantages of small area, low loss, strong adaptability and strict synchronization in various environments.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.