Signal predistortion circuit configuration
US11705928B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2022 |
| Grant date | Jul 18, 2023 |
| Priority date | — |
| Expiry date | Feb 18, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2001/0425
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A signal predistortion circuit configuration includes a digital predistortion circuit, a first transceiver, a first analog front-end (AFE) circuit, a second transceiver, and a second AFE circuit. The digital predistortion circuit outputs a first transmission signal according to first predistortion parameters and outputs a second transmission signal according to second predistortion parameters, and the digital predistortion circuit determines whether to adjust the first predistortion parameters according to a first reception signal and determines whether to adjust the second predistortion parameters according to a second reception signal. A transmitting circuit of the first transceiver, the first AFE circuit, and a receiving circuit of the second transceiver jointly generates the first reception signal according to the first transmission signal. A transmitting circuit of the second transceiver, the second AFE circuit, and a receiving circuit of the first transceiver jointly generates the second reception signal according to the second transmission signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.