Semiconductor device including standard cells with combined active region
US11709985B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 19, 2020 |
| Grant date | Jul 25, 2023 |
| Priority date | — |
| Expiry date | Aug 3, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/5286
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a first and a second power rails extending in a row direction, a third power rail extending in the row direction between the first and second power rail, and a first cell arranged between the first second power rails. A cell height of the first cell in a column direction perpendicular to the row direction is equal to a pitch between the first and second power rails. The semiconductor device also includes a second cell arranged between the first and third power rails. A cell height of the second cell in the column direction is equal to a pitch between the first and third power rails. A first active region of the first cell includes a first width in the column direction greater than a second width, in the column direction, of a second active region in the second cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.