Shift register unit and driving method thereof, gate driving circuit, and display device
US11710435B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 18, 2019 |
| Grant date | Jul 25, 2023 |
| Priority date | — |
| Expiry date | Apr 24, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/045
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register unit and a driving method thereof, a gate driving circuit, and a display device are provided. In the shift register unit, the input circuit inputs an input signal to a first node; the output circuit outputs an output signal to an output terminal; the first control circuit performs a first control on a level of a first control node; the first noise reduction control circuit controls a level of a second node; the second control circuit performs a second control on a level of a second control node; the second noise reduction control circuit controls a level of a third node; the first voltage-stabilizing circuit performs a third control on the level of the second control node, and the second control and the third control cause at least part of the second noise reduction control circuit to be in different bias states.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.