Multiphase clock generators with digital calibration
US11711200B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2021 |
| Grant date | Jul 25, 2023 |
| Priority date | — |
| Expiry date | Dec 16, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/033
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Apparatus and methods for multiphase clock generation are provided herein. In certain embodiments, a multiphase clock generator includes a first clock buffer that generates a first output clock signal based on a first input clock signal, a second clock buffer that generates a second output clock signal based on a second input clock signal, and a first clock interpolation circuit that generates a third output clock signal based on interpolating the first input clock signal and the second input clock signal. The first clock interpolation circuit generates the third output clock signal based on multiplying the first input clock signal by a first adjustable current to generate a first multiplied current, multiplying the second input clock signal by a second adjustable current to generate a second multiplied current, combining the first multiplied current and the second multiplied current to generate a combined current, and integrating the combined current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.