Semiconductor devices and methods for fabricating thereof
US11711915B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 2022 |
| Grant date | Jul 25, 2023 |
| Priority date | — |
| Expiry date | Jan 7, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B53/30
Abstract
Semiconductor device may include a landing pad and a lower electrode that is on and is connected to the landing pad and includes an outer portion and an inner portion inside the outer portion. The outer portion includes first and second regions. The semiconductor devices may also include a dielectric film on the first region of the outer portion on the lower electrode and an upper electrode on the dielectric film. The first region of the outer portion of the lower electrode may include a silicon (Si) dopant, the dielectric film does not extend along the second region of the outer portion. A concentration of the silicon dopant in the first region of the outer portion is different from a concentration of the silicon dopant in the second region of the outer portion and is higher than a concentration of the silicon dopant in the inner portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.