Patent · US Active

Elementary cell comprising a resistive memory and associated method of initialization

US11711988B2 · kind B2 · utility

0Cited by
0References
15Claims
0Family size

Assignee

Inventor

Key dates

Filing dateDec 16, 2020
Grant dateJul 25, 2023
Priority date
Expiry dateFeb 19, 2041

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B63/10

Abstract

An aspect of the invention relates to an elementary cell that includes a breakdown layer made of dielectric having a thickness that depends on a breakdown voltage, a device and a non-volatile resistive memory mounted in series, the device including an upper selector electrode, a lower selector electrode, a layer made in a first active material, referred to as active selector layer, the device being intended to form a volatile selector; the memory including an upper memory electrode, a lower memory electrode, a layer made in at least one second active material, referred to as active memory layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.