System and method for ultra-low overhead and recovery time for secure non-volatile memories
US11714725B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 3, 2020 |
| Grant date | Aug 1, 2023 |
| Priority date | — |
| Expiry date | Feb 12, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7207
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A device comprising a memory controller coupled to a non-volatile memory (NVM) device with a shadow tracker memory region. The controller comprises a low-overhead and low recovery time for integrity-protected systems by recovering a secure metadata cache. The controller is configured to persistently track addresses of blocks in the secure metadata cache in the NVM device when a miss occurs, and track the persistent addresses, after the miss. The controller is configured to rebuild affected parts of the secure metadata cache associated with the persistent addresses in the NVM device. A system is provided which includes the memory controller interfaced with an NVM device with the shadow tracker memory region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.