Fault detection display apparatus and operation method thereof
US11715399B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2022 |
| Grant date | Aug 1, 2023 |
| Priority date | — |
| Expiry date | Mar 22, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/12
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is integrated circuit panel which detects fault of a driving circuit. The integrated circuit panel includes: a driving circuit array including first and second driving circuits; a data driver configured to output first and second input data signals through first and second data lines, respectively; a switch driver configured to output a switching signal through a switch line; and an error detection driver configured to receive first and second output data signals through first and second test lines, respectively, wherein, in response to the switching signal, the first and second driving circuits are configured to output the first and second output data signals, which are based on the first and second input data signal, through the first and second test lines, respectively, and the error detection driver is configured to detect a fault of the first or second driving circuit based on the first or second output data signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.