Driving circuit
US11715409B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 10, 2019 |
| Grant date | Aug 1, 2023 |
| Priority date | — |
| Expiry date | Dec 10, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A driving circuit that includes a timing controller, a selecting module connected to the timing controller, and a level shifter connected to the selecting module, wherein the timing controller includes N pins, each of the pins provides a clock signal, and N is a positive integer; the selecting module includes N selecting units, an input terminal of each of the selecting units is connected to a corresponding pin of the timing controller, output terminals of each of the selecting units are connected to M input pins of the level shifter, and M is greater than or equal to 2. The driving circuit according to the present invention individually passes clock signals of a timing controller through selecting units and outputs to a level shifter, and pins of the timing controller can be substantially saved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.