Interposer having shielded contacts and traces
US11715912B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 2, 2022 |
| Grant date | Aug 1, 2023 |
| Priority date | — |
| Expiry date | Aug 2, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01R12/7082
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A separable and reconnectable connector for semiconductor devices is provided that is scalable for devices having very small contact pitch. Connectors of the present disclosure include signal pins shielded by pins electrically-coupled to ground. Embodiments provide one or more signal pins in a contact array electrically-shielded by at least one ground pin coupled to a ground plane. Embodiments thereby provide signal pins, either single-ended or a differential pair, usable to transmit signals with reduced noise or cross-talk and thus improved signal integrity. Embodiments further provide inner ground planes coupled to connector ground pins to shield pairs of differential signal pins without increasing the size of the connector. Inner grounding layers can be formed within isolation substrates incorporated into connector embodiments between adjacent pairs of signal pins. These buried ground layers provide additional crosstalk isolation in close proximity to signal pins, resulting in improved signal integrity in a significantly reduced space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.