Method, system and apparatus for error correction coding embedded in physically unclonable function arrays
US11720672B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2022 |
| Grant date | Aug 8, 2023 |
| Priority date | — |
| Expiry date | Apr 25, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The disclosure generally provides methods, systems and apparatus for an improved a Physically Unclonable Function (PUF). In one embodiment, the disclosure relates to a method to provide data from a Physically Unclonable Function (PUF) circuit array. The method includes storing a plurality of first data bits into a respective ones of a plurality of first bitcells of the PUF array to form a first dataset; storing a plurality of second data bits into a respective ones of a plurality of second bitcells of the PUF array, the plurality of second data bits defining a helper dataset; reading the first dataset from the plurality of first bitcells to provide a first read dataset; applying an error correction factor to the first read data dataset to form a security key dataset; and outputting the security key dataset from the PUF circuit array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.