Signal isolator having at least one isolation island
US11721648B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2022 |
| Grant date | Aug 8, 2023 |
| Priority date | — |
| Expiry date | Apr 19, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0266
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus for a signal isolator having reduced parasitics. An example embodiment, a signal isolator and include a first metal region electrically connected to a first die portion, a second die portion isolated from the first die portion, and a second metal region electrically connected to the second die portion. A third metal region can be electrically isolated from the first and second metal regions and a third die portion can be electrically isolated from the first, second and third metal regions. In embodiments, the first metal region, the second metal region, and the third metal region provide a first isolated signal path from the first die portion to the second die portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.