Transmit driver architecture
US11728835B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 1, 2021 |
| Grant date | Aug 15, 2023 |
| Priority date | — |
| Expiry date | Sep 1, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/0028
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An apparatus including a signal generation circuitry to provide a stream of digital signals carrying data. The apparatus includes a storage circuitry to provide a plurality of transmit levels corresponding to respective predetermined equalization levels; selection circuitry to select a transmit level from among the plurality of transmit levels based on the digital signals carrying data. Each of the plurality of transmit levels is a respective input signal to the selection circuitry. The apparatus includes a digital-to-analog converter (DAC) circuitry configured to receive the selected transmit level and convert the selected transmit level to an analog signal of the selected transmit level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.