Ray intersection testing with quantization and interval representations
US11734871B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 24, 2021 |
| Grant date | Aug 22, 2023 |
| Priority date | — |
| Expiry date | Nov 24, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2215/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are disclosed relating to primitive intersection testing for ray tracing in graphics processors. In some embodiments, a graphics processor includes ray intersection circuitry configured to perform an intersection test, which includes to: quantize a first representation of the primitive to generate a reduced-precision interval representation of the primitive, quantize a first representation of the ray to generate a reduced-precision interval representation of the ray, and determine, using interval arithmetic, an initial intersection result based on coordinates of the interval representation of the primitive and coordinates of the interval representation of the ray. The initial intersection result may be a conservative result such that a miss indicated by the initial intersection result is guaranteed not to be a hit for the first representation of the primitive and first representation of the ray. Disclosed techniques may improve performance, reduce power consumption, or both, relative to traditional techniques.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.