Sub-word-line drivers and semiconductor memory devices including the same
US11735248B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 3, 2022 |
| Grant date | Aug 22, 2023 |
| Priority date | — |
| Expiry date | Mar 3, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/488
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sub-word-line driver and semiconductor memory devices including the same are provided. The sub-word-line driver may include a word line pull-up transistor, a word line pull-down transistor, and a keeping transistor configured to maintain a word line at a specified voltage level. The sub-word-line driver may include a peripheral active region on a substrate, a first peripheral gate electrode that corresponds to a gate node of the word line pull-down transistor on the peripheral active region, a second peripheral gate electrode that corresponds to a gate node of the keeping transistor on the peripheral active region, and a first lower contact coupled to a first region of the peripheral active region. A first (VBB) voltage from the first region may be supplied to a source node of the keeping transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.