Interdigital capacitor and multiplying digital-to-analog conversion circuit
US11736116B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2021 |
| Grant date | Aug 22, 2023 |
| Priority date | — |
| Expiry date | Feb 24, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/714
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An interdigital capacitor and a multiplying digital-to-analog conversion circuit, where the interdigital capacitor includes at least one first metal layer. The following components are disposed in each first metal layer: a first electrode; at least one first finger metal connected to the first electrode; a second electrode; and a plurality of second finger metals connected to the second electrode, and at least one third finger metal connected to the second electrode. The at least one first finger metal is alternately disposed with the plurality of second finger metals to form capacitors, and the at least one third finger metal is a dummy finger metal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.