Backpressure from an external processing system transparently connected to a router
US11736415B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 10, 2020 |
| Grant date | Aug 22, 2023 |
| Priority date | — |
| Expiry date | Jun 29, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2009/45595
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An external processing system includes a port configured to exchange signals with a router and one or more processors configured to instantiate an operating system and a hypervisor based on information provided by the router in response to the external processing system being connected to the router. The processors implement a user plane layer that generates feedback representative of a processing load and provides the feedback to the router via the port. The router includes a port allocated to an external processing system and a controller that provides the information representing the operating system and hypervisor in response to connection of the external processing system. The controller also receives feedback indicating a processing load at the external processing system. A queue holds packets prior to providing the packets to the external processing system. The controller discards one or more of the packets from the queue based on the feedback.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.